AIDAsoft Analog IC Design Automation

About Us

The AIDAsoft project is being developed by the ICG (Integrated Circuits Group) research team at the associated lab Instituto de Telecomunicações, Lisbon, Portugal.

This work was supported in part by the Instituto de Telecomunicações (Research projects AIDA - IT/LA/1112/2011 and OPERA - PEst-OE/EEI/LA0008/2013) and by the Fundação para a Ciência e Tecnologia (Research project DISRUPTIVE EXCL/EEI-ELC/0261/2012, Grant FCT-DFRH-SFRH/BD/72698/ 2010, Grant FCT-SFRH/BD/86608/2012 and SFRH/BPD/104648/2014). This work was also funded by FCT/MEC through national funds and when applicable co-funded by FEDER - PT2020 partnership agreement under the project UID/EEA/50008/2019.

AIDA-CL pareto front   AIDA-CL pareto front  

 

 
This work was supported in part by the Instituto de Telecomunicações (Research projects AIDA - IT/LA/1112/2011 and OPERA - PEst-OE/EEI/LA0008/2013) and by the Fundação para a Ciência e Tecnologia (Research project DISRUPTIVE EXCL/EEI-ELC/0261/2012, Grant FCT-DFRH-SFRH/BD/72698/ 2010, Grant FCT-SFRH/BD/86608/2012 and SFRH/BPD/104648/2014).
This work was also funded by FCT/MEC through national funds and when applicable co-funded by FEDER - PT2020 partnership agreement under the project UID/EEA/50008/2019.
  ©2019 Instituto de Telecomunicações